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View Full Version : Solderability test for gold terminations?


ahfoong
1st August 2004, 10:09 PM
Hi guys,

I know this may not be the right place to ask such a question, but I really need to know what the industry requirements are for performing solderability test on units with gold terminations.

I hope some kind soul out there can enlighten me! :rolleyes:

If not, can someone direct me to the right place to ask this question?
:thanx:

Bob

Al Rosen
1st August 2004, 11:25 PM
Hi guys,

I know this may not be the right place to ask such a question, but I really need to know what the industry requirements are for performing solderability test on units with gold terminations.

I hope some kind soul out there can enlighten me! :rolleyes:

If not, can someone direct me to the right place to ask this question?
:thanx:

Bob
Hi Bob:
Your right, it is in the wrong place, but let me try to help.


Go to the JEDEC web site http://www.jedec.org/download/default.cfm
Register to download their free standards.
Search for EIA/JESD22-B102-C, SOLDERABILITY:
Download it.
I hope this helps.

Wes Bucey
2nd August 2004, 02:42 AM
Hi Bob:
Your right, it is in the wrong place, but let me try to help.

Go to the JEDEC web site http://www.jedec.org/download/default.cfm
Register to download their free standards.
Search for EIA/JESD22-B102-C, SOLDERABILITY:
Download it.
I hope this helps.Seems to me like Bob DID come to the right place!:applause: :agree1:

ahfoong
2nd August 2004, 03:23 AM
Thanks for the replies.

Actually, I've already gotten a copy of the Jedec std, but its kinda vague about the actual test procedures for gold terminations.
All it says is that it requires 2 dips as opposed to 1 dip for normal solder plating.
I need specific parameters like solder temperature, dwell time, type of solder paste/flux, etc.
And is gold termination classified as solder plating or lead-free? I would assume the latter, but the Jedec std governing lead-free solderability tests have yet to be released... B102D to be exact.

So, I am still not getting anywhere... :confused:

Anymore helpers out there?

Bob

e006823
2nd August 2004, 07:31 AM
Thanks for the replies.

Actually, I've already gotten a copy of the Jedec std, but its kinda vague about the actual test procedures for gold terminations.
All it says is that it requires 2 dips as opposed to 1 dip for normal solder plating.
I need specific parameters like solder temperature, dwell time, type of solder paste/flux, etc.
And is gold termination classified as solder plating or lead-free? I would assume the latter, but the Jedec std governing lead-free solderability tests have yet to be released... B102D to be exact.


Lead-Free refers to the type of solder used. Will the final assembly use lead-free solder. J-std-001 has more details about flux and solder bath temperature (I'm assuming these components are part of an electronic assembly). If you are pretinning and inspection of the components is part of your assembly process you needn't perform solderability testing (per J-std-001).

Bob

Jim Howe
2nd August 2004, 08:37 AM
It was back in the early 80's, in a previous life, that we double dipped gold leads. The first dip was to remove the gold, the second to pre-tin the leads. I don't recall any testing since we were 100% inspect but I do recall that the solder pot had limited life do to the accumulation of gold in the pot. We had to change the pot after so many hours because of this but I :caution: cannot remember how many hours. Thats what happens when you get old, you know!

Al Rosen
2nd August 2004, 10:12 AM
Seems to me like Bob DID come to the right place!:applause: :agree1:
Sorry, I thought the thread was in the wrong Forum.:bonk:

Jim Howe
18th September 2004, 09:39 AM
So ahfoong, please tell us what you decided on. Are you pretinning the gold leads? if so what method are you using?
Just curious!

ahfoong
19th September 2004, 09:26 PM
In reply to your questions, Jim, this is what we are doing at my plant right now.

We are running on a 2 solder pot situation, whereby the first pot is used to scavange the gold from the leads before the solderability test is performed using the second pot, based on the requirements of JESD22-B102C.
We are using a dip-&-look method.

As to your question regarding pretinning, I am not familiar with the term. Perhaps if you'd elaborate a bit, I could answer the question.

Jim Howe
20th September 2004, 10:01 AM
In reply to your questions, Jim, this is what we are doing at my plant right now.

We are running on a 2 solder pot situation, whereby the first pot is used to scavange the gold from the leads before the solderability test is performed using the second pot, based on the requirements of JESD22-B102C.
We are using a dip-&-look method.

As to your question regarding pretinning, I am not familiar with the term. Perhaps if you'd elaborate a bit, I could answer the question.

ahfoong,
Back in the 1980's we wave soldered 1000's of PC Boards (7 to 15 layers) with plated through holes. Most of the IC's were the traditional tinned leads and some were gold plated. It seems that even the factory tinned leads would oxidize over time. Our problem was getting the solder to flow up through the PTH. We found that by re-tinning the leads "pretinning" the leads of the IC's the problem was minimized.

What is pretinning? It is simply dipping the leads in solder Which is the same thing you are doing with the gold leads except the gold must be dipped twice.
Our process was essentially what yours is except we used "continuos flow" solder pots.

ahfoong
20th September 2004, 10:18 PM
Okay... so that's pretinning.
I guess its the same as the process you once did, only difference is that its a test for me, instead of a process.

Thanks for all your inputs/help. :thanks: