T
tantan
Hi, i am currently writing the SOPs for design control and am at a stuck with verification and validation. i have found lots of good sites with great definitions, inlcuding this forum but when i go to practically apply it I get confused. For example...validation is supposedly testing that the user requirements are satisfied...where eslewhere a verfication process will say convert user needs/ req to specs, develop a test protocol from this to verify design input to output. Isnt this a contradiction in terms as its essentially doing the same thing!?
Or could i look at it this way-requirements are composed of 3 aspects...functional, performance and interface requirements. These in turn are converted into engineering specfications. The testing of the functional components completes the validation, and the testing of the performance and interface requirements, as well as other means such as code walkthroughs etc completes the verification.
If anyone else could shed some light it would be greatly appreciated!!
Thanks
Tania
Or could i look at it this way-requirements are composed of 3 aspects...functional, performance and interface requirements. These in turn are converted into engineering specfications. The testing of the functional components completes the validation, and the testing of the performance and interface requirements, as well as other means such as code walkthroughs etc completes the verification.
If anyone else could shed some light it would be greatly appreciated!!
Thanks
Tania