Design verification for interim design outputs - sampling rationale

racglobal

Involved In Discussions
#1
Hello everyone,

In building a large and complex electrical medical device also linked to software, there are many what I call interim design outputs (for examples, a populated PCB board) that are not the final design output (the finished medical device) but are what I call "sub-systems" or "modules", in performing design verification (to verify that the outputs meet our input requirements), what is the sampling rationale? We are taking what we receive from a supplier to see if the component meets specifications. This PCB board would be an interim design output; is there a particular sampling rationale when planning the design verification for an interim design output? In this case, how many PCB boards would be tested? I would appreciate any insight on this. Thanks.
 
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indubioush

Quite Involved in Discussions
#2
Design verification sample sizes should be driven by the associated risks of the component or system. Usually you have requirements for confidence/reliability according to the associated risk level. The higher the risk, the greater the required confidence/reliability. This required confidence/reliability will determine the sample size. For example, if 95/95 confidence reliability is required, this would mean a sample size of 60. This is why it is very important to perform risk management activities early on in the development process. With all of that said, however, it seems to me that you are doing some feasibility testing at this point. If you plan on repeating your test later for your official design verification, you can select any sample size you want right now.
 

Ronen E

Problem Solver
Staff member
Moderator
#3
Hello everyone,

In building a large and complex electrical medical device also linked to software, there are many what I call interim design outputs (for examples, a populated PCB board) that are not the final design output (the finished medical device) but are what I call "sub-systems" or "modules", in performing design verification (to verify that the outputs meet our input requirements), what is the sampling rationale? We are taking what we receive from a supplier to see if the component meets specifications. This PCB board would be an interim design output; is there a particular sampling rationale when planning the design verification for an interim design output? In this case, how many PCB boards would be tested? I would appreciate any insight on this. Thanks.
Have a look at my article. It'll walk you through a rational design verification process that can be applied with relatively small (given) sample sizes, and at that is statistically sound (well, until someone shows me how it isn't).

Jumping straight to questions like sample size or confidence levels is a little silly without first considering whether the underlying most basic inference assumptions hold (e.g. "the sample represents the population/process", "the samples come from a homogeneous process", "the measuring system is good enough").
 
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