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I'm curious if anyone has examples of their engineering justifications/in house verification methods to eliminate or significantly reduce the NRTL testing required after modification of ME equipment.
For Example:
Spinning a PCB - Layer stackup changes, layout changes, etc. Component addition. Routing differences.
In my mind this can have an effect on the noise profile of the system and depending if you've changed the ground planes, I/O locations, ESD mitigation devices etc it can alter your immunity.
In my mind the safest bet is to retest at an accredited lab to ensure compliance to 60601-1-2; however, I'm curious to see other's techniques to limit the amount of testing.
Do things as simple as near field sniffing before/after change and evaluating the difference work? Has anyone had that type of data reviewed and scrutinized?
Let's get some thoughts on this.
For Example:
Spinning a PCB - Layer stackup changes, layout changes, etc. Component addition. Routing differences.
In my mind this can have an effect on the noise profile of the system and depending if you've changed the ground planes, I/O locations, ESD mitigation devices etc it can alter your immunity.
In my mind the safest bet is to retest at an accredited lab to ensure compliance to 60601-1-2; however, I'm curious to see other's techniques to limit the amount of testing.
Do things as simple as near field sniffing before/after change and evaluating the difference work? Has anyone had that type of data reviewed and scrutinized?
Let's get some thoughts on this.