Standard(s) for QC Testing of Assembled ICs

[DJ5657]

Hi everyone. Currently I am with a company who perform testing of assembled ICs on a set up. Here is the step by step test flow standard :

Step 1 : Run of SUV. A number of known good units and reject units is being tested in the set up to determine if the set up is detecting properly tested good and reject.

Step 2 : Lot Track In. Lot details is encoded by operator to the system for traceability.

Step 3 : Start of Electrical Testing. Untested assembled ICs are electrically tested.

Step 4: QC sampling. Tested good units are sampled among the lot. These are automatically segregated by the test handler.

Step 5 : QC Testing. The selected tested good units based on AQL at 0.1% level will be tested using a QC program.

Step 6 : COunt Reconciliation and Lot Track out. This is the last step where in the test results will be reconciled with the tester data or summary.

My question is about QC testing. I would like to know if we have an existing standard such as JEDEC, TS 16949 clauses or section that requires QC testing.

I am asking this because I want to challenge our current process to eliminate the test flow that are redundant. I know that QC testing is a redundant testing stage since we already have the Electrical Testing prior QC Testing.

Hope that someone here will provide me an answer for my enlightenment.

Thanks guys!

 

[DJ5657]

I need your help guys. I am hoping for your reply. Thank You.

 

[Stijloor]

Your initial post was two and a half hours ago. Please be patient.

 

[Marc]

I am not aware of any specific QC testing defined in a standard. Usually those are contract/customer specific, so if there are no QC requirements in your contracts you can eliminate what you can justify as "unnecessary" steps. The first question to ask is why the "extra step" in your process was put there to begin with.

 

[Hershal]

The industry has published a series of standards in this regard. There are specific requirements for such things as the gas in the testers, pins, etc.

In truth, the vectors determine the specific test points.

The JEDEC standards define this, and must be followed. The JEDECs are a bit weak on some points, but the testing is rigorous.

The points you mention are process points, NOT standard issues.

The flow can be designed to comply to the standards easily.

Hope this helps.